OVER 12 YEARS WORKING IN THE SPACE MARKET


LOIS Engineering

LOIS Engineering design house is a leading service provider of embedded solutions for space projects. Our main focus is on the field of FPGA Design & Verification with& without software co-processing. We have long-term experience in projects involving signal processing, sensor interfaces and communication interfaces.

System modelling

  • Requirement analysis & system modelling
  • System architecture
  • Interface Definition (TM & TC)
  • Verification & Validation Plan

FPGA development

  • FPGA & software coworking
  • FPGA development & verification
  • STA & Post-Layout simulation
  • Languages: VHDL, Verilog, HLS, TCL, Matlab HDL Coder...

Software development

  • Application software development & verification
  • Embedded operating system
  • Embedded processor
  • Languages: C, C++, Python, Bash, TCL...

PROVEN EXPERIENCE

We have worked with the main players in the Space Market in Europe.

Our team has the expertise to produce documentation and design deliverables in compliance with the industry standards at every stage of the project.
ECSS-Q-ST-60-02, CCSDS 301.0-B-4, ECSS-E-ST-50-53C, ADS.E.0804, DO-254.

MANUFACTURERS

We have proven experience with the main FPGA manufacturers in the industry:

  • Microchip (PROASIC3 / RTG4)
  • AMD (KINTEX)
  • NanoXplore (NG-LARGE / MEDIUM)

COMMUNCATION INTERFACES

We speak the most common communication interfaces used in this industry:

  • RMAP-SpaceWire
  • Ethernet
  • CAN
  • AXI4, Wishbone
  • PUS
  • SPI, I2C, UART

END TO END SUPPORT

We believe in precision, creativity, and a client-centric approach. From concept to execution, experience the art of efficiency in every project. We support you during the whole development cycle.

Definition & specification phase

Architectural design

Implementation phase

Formal verification and validation & project closure

Follow-on activities

WE UNDERSTAND SOFTWARE & HARDWARE!

With increasing complexity, FPGA projects are no longer stand-alone projects.

A clean & successful split between functions implemented in the FPGA (PL) and in the Processing System (PS) is the key to successfully completing a project on time.

 

FPGA MEETS DEVOPS

 

We use leading software development methodologies and tools adapted to FPGA design to improve design quality and reduce development & verification time.

TDD phylosophy

Agile development

Autocoding

Continuous integration

Bug tracking software